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NEC Electronics Announces Development of a New Selective-Metal-Cap Structure on the Low-Power Cu Interconnects

Improves Reliability of LSI Systems by Ten Times


KAWASAKI, Japan, June 4, 2009

NEC Electronics Corporation today announced that it has developed a new low-power copper (Cu) interconnect structure with selective-metal cap that covers only the surface of the Cu buried in a special porous low-k film, using a stable cobalt-alloy film. The new technology is essential to developing highly-reliable, leading-edge LSI devices. Their interconnect reliability will dramatically increase by ten times as compared with the conventional interconnects, while keeping the dielectric reliability of the porous low dielectric-constant (low-k) film high.
The structural features of the new Cu-interconnect structure are as follows:

(1) The new Cu-interconnect structure is realized by combining the sophisticated molecular design for the porous low-k (Note 1), called the molecular-pore-stack (MPS, Note 2) low-k film, with the selective deposition technology of cobalt alloy on the unstable Cu surface.

(2) Remarkable high-reliability in both Cu-interconnect and low-k dielectrics had been achieved by implementing cobalt alloy capping on the Cu surface, and MPS low-k without the Co diffusion.

(3) By the selective deposition of cobalt alloy, electromigration (EM, Note 3) of the Cu atoms is suppressed, resulting in ten times the improvement of the EM reliability. The stress-induced voiding (SiV, Note 4) under high-temperature thermal stress at 175 degrees Celsius is also suppressed completely, confirming the dependability under severe operation-circumstances for automobile applications.


For the leading-edge LSI at 28 nanometer (nm) node and beyond, the width and space of the Cu-interconnect are scaled down to below 100-nm, and high power consumption and reliability degradation have become serious issues for these miniaturized interconnects. To overcome these issues, low-power and super-reliable Cu interconnects with selective cobalt alloy cap have been developed combined with the MPS low-k films.
In order to decrease power consumption, porous low-k dielectric films are implemented to reduce interconnect parasitic capacitance, which is essentially the source of active power consumption. NEC Electronics, jointly with MIRAI project, developed the MPS film, which contains tiny closed-pores dispersed in the dielectric matrix for higher endurance against the process damages and the water immersion. However, stabilization of the Cu surface still needed to be realized to achieve fine-pitch interconnects with high reliability.
To stabilize the Cu surface, the selective cobalt plating technique has been experimented recently, in which wafers with Cu interconnect patterns in dielectric film are dipped into the electrode-less-plating chemical solution containing cobalt ions to selectively grow a cobalt alloy film on the Cu surface. However, in case of the porous low-k film, it had been very difficult to solve the reliability degradation caused by penetration of the cobalt ions into the porous films.
To simultaneously achieve low power consumption and high reliability in scaled-down LSI interconnects, NEC Electronics has been striving to overcome the technology barrier and has finally succeeded in the development of the MPS low-k film with tiny isolated-pores as dielectrics. Through this technology, cobalt diffusion into the MPS film was completely blocked and the unstable Cu surface was selectively covered with the cobalt-alloy cap, realizing robust Cu interconnect with both low power consumption and high reliability. Its basic feasibility to ultrafine low-power interconnect has been confirmed to surpass strict reliability criteria assumed for automobile applications under the operation circumstance over 150 degrees Celsius.
NEC Electronics believes these new technologies will contribute to low-power and robust LSI at the 28-nm node and beyond, and is aiming to advance its research and development activities in this area.
NEC Electronics presented the results of this research at the International Interconnect Technology conference 2009 (IITC 2009), held from June 1 through June 3, in Sapporo, Japan.



About NEC Electronics

NEC Electronics Corporation (TSE: 6723) specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets; system solutions for the mobile handset, PC peripheral, automotive and digital consumer markets; and multi-market solutions for a wide range of customer applications. NEC Electronics Corporation has subsidiaries worldwide including NEC Electronics America, Inc. and NEC Electronics (Europe) GmbH. More information about NEC Electronics worldwide can be found at www.necel.com.



Porous low-k film: Generic name for Low-k dielectrics with tiny molecular –scale pores of k to 1. The porous structure is needed to decrease the k-values below 2.6.
Molecular-pore-stacking (MPS) film: A porous low-k film deposited by stacking silica-based precursor molecules, which contains sub-nanometer pore as a molecular frame. NEC participated in the MIRAI project of "Interconnect Module Technology with Low-k Materials" that was carried out from July 2001 to March 2004 (the first stage), and from April 2004 to March 2006 (the second stage). MIRAI projects are supported by the New Energy and Industrial Technology Organization (“NEDO”). In the project, 300-mm MPS deposition tool and the 300-mm MPS deposition process on 300-mm wafers were developed. NEC received technology transfer from the MIRAI project.
Electromigration (EM): A type of failure phenomena caused by the corrosion of electrons against Cu atoms. The surface Cu atoms are moved in the direction parallel to the electron flow, making voids in the Cu interconnect. The electron window or the electron density is increased especially in the tiny via by scaling so that electrical break-down occurs preferably at the bottom. To improve the EM reliability, it is important to suppress the surface migration of Cu atoms in the scaled-down interconnects.
Stress-induced Voiding (SiV): A type of failure phenomena caused by the thermal stress to the Cu films. The surface Cu atoms are moved by the thermal stress to create voids under the Cu vias. To improve the SiV reliability, it is important to suppress the surface migration of Cu atoms in the scaled-down interconnects.


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